发明名称 MEMORY TESTING
摘要 PROBLEM TO BE SOLVED: To provide a data processing apparatus for detecting a memory fault by testing a memory in a data processing apparatus. SOLUTION: The data processing apparatus includes at least one memory, processing logic for performing data processing operations and for accessing at least one memory and memory testing logic for performing a transparent algorithm testing routine on at least one memory. The data processing apparatus impedes the processing logic from accessing at least the one memory while the memory testing logic is performing a testing routine wherein the processing logic and the memory testing logic are capable of detecting a system event. The memory testing logic stops the testing routine when performing the testing routine and restores at least the one memory to an initial state to respond to detection of the system event. The initial state is a state it is in immediately prior to commencement of the testing routine, whereupon the data processing apparatus allows the processing logic to access at least the one memory. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008016035(A) 申请公布日期 2008.01.24
申请号 JP20070177914 申请日期 2007.07.06
申请人 ARM LTD 发明人 HUGHES PAUL S
分类号 G06F12/16 主分类号 G06F12/16
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