发明名称 IMAGE CONTROL IC AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To provide an image processing controller IC which has reduced peak of EMI noise as a whole by supplying clock signals of different phases to three color signal processing circuits, respectively, and eliminating overlap of each EMI noise generated at different timing on a time axis by the clock signals of different phases. SOLUTION: The image control IC for processing a color data for one pixel by dividing the data into a first to third color signals R, G, B has: a clock signal generating circuit 28 which receives a reference clock signal DCLK and outputs the first to third clock signalsϕ1 toϕ3 differing in phase from each other; a first color signal processing circuit 20 for processing the first color signal R using a first synchronizing circuit driven simultaneously by the clock signalϕ1; a second color signal processing circuit 22 for processing the second color signal G using a second synchronizing circuit driven simultaneously by the clock signalϕ2; and a third color signal processing circuit 24 for processing the third color signal B using a third synchronizing circuit driven simultaneously by the clock signalϕ3. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008015407(A) 申请公布日期 2008.01.24
申请号 JP20060188987 申请日期 2006.07.10
申请人 SEIKO EPSON CORP 发明人 IKEDA KATSUICHI
分类号 G09G5/02;G02F1/133;G06T1/00;G09G3/20;G09G3/36;H03K19/0175;H04N1/46;H04N1/60 主分类号 G09G5/02
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