发明名称 Method and apparatus for reducing jitter in output signals from a frequency synthesizer using a control word having a fractional bit
摘要 A method for reducing jitter in an output signal from a frequency synthesizer using a control word having a fractional bit includes dividing the output signal by a predetermined divisor to present a modified output signal substantially free of jitter.
申请公布号 US2008021944(A1) 申请公布日期 2008.01.24
申请号 US20060489982 申请日期 2006.07.20
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 XIU LIMING
分类号 G06F1/02 主分类号 G06F1/02
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