| 摘要 |
<p>A flash memory device and a manufacturing method thereof are provided to reduce resistance of a source line and to improve integration degree of a cell by forming the source line with a silicide layer. Plural trench lines are formed in a first direction. Plural gate lines are formed in a second direction perpendicular to the first direction. A junction(21) is formed between the gate lines by implanting ion into an active region and a trench region in the second direction parallel with the gate line. A silicide layer(23) is self-aligned on the junction in a direction parallel with the gate line in a common source region. The trench line is parallel with a bit line. The gate line is parallel with a word line. The self-aligned silicide layer is formed on the same plane. The trench region, the trench region, and the common source region are formed on a semiconductor substrate.</p> |
