发明名称 Pipeline processor with queue busy judgement; program and recording medium for the same
摘要 In the present invention, in order that a busy judgment of a register can be made without fail and without increasing the number of hardware resources for storing a request into the register provided at the final stage of a pipeline register in a stage in which the request is retained halfway in the pipeline register in a pipeline processor, a first counter (25) for counting the number of valid requests in the registers (12a) between a judgment section (23) interposed in the pipeline register (12) and for judging whether the request is a valid request and a request queue (13) and a busy judgment section (22) for judging whether the request queue (13) is in a busy state based on the number of valid requests counted by the first counter (25) are provided and a judgment is made by the judgment section (23) based on the result of the busy state judgment by the busy judgment section(22).
申请公布号 EP1703376(A3) 申请公布日期 2008.01.23
申请号 EP20050013582 申请日期 2005.06.23
申请人 FUJITSU LIMITED 发明人 MATSUI, TAKAO;HOSOKAWA, YUKA;HATAIDA, MAKOTO;UEKI, TOSHIKAZU;OKADA, SEISHI
分类号 G06F9/38 主分类号 G06F9/38
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