发明名称 Cache memory system
摘要 Cache memory system 1 based on a virtual indexed, physical tagged architecture and comprising a virtual index obtaining unit 13 operable to obtain based on a virtual address, virtual indexes of an access-target cache line and a cache line potentially having a cache-aliasing relationship with the access-target cache line. A physical tag obtaining unit 15 obtains a physical tag TAG of a physical page by performing address translation on the virtual address. A comparator 16 compares a physical tag obtained by the physical tag obtaining unit 15 with each tag information piece TAG(i) belonging to cache lines corresponding to the virtual indexes and output from the tag array 11a based on the virtual indexes obtained by the virtual index obtaining unit 13, and determines a cache hit/miss. Also supported is a system for aliasing detection in which the comparator 16 compares the tag information, corresponding to an access-target cache line, with the tag information corresponding to a cache line potentially having a cache-aliasing relationship with the access-target cache line. If coincidence is detected a cache aliasing is present.
申请公布号 GB2440263(A) 申请公布日期 2008.01.23
申请号 GB20070013897 申请日期 2007.07.17
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD 发明人 SEIMIZU JOUKAN;TOMOHIRO HIRATA;KIYOSHI OWADA
分类号 G06F12/08 主分类号 G06F12/08
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