| 摘要 |
<p>A silicon wafer (8), with a diffusion area (7) formed in a predetermined region on one side, comprises a lower electrode of a capacitor unit (10). A first metal layer (2) is connected to a first power supply wiring (VDD) and comprises an upper electrode of the capacitor unit (10). Second metal layers (6a, 6b) are connected to a second power supply wiring (GND) and are also formed on the side where diffusion area (7) is formed on silicon wafer (8). An oxide film (3) is placed between the first metal layer (2) and the surface of the silicon wafer (8) where the diffusion area (7) is formed. The capacitance of the capacitor unit (10) is determined by the dielectric constant ε and thickness T of the oxide film (3).
</p> |
