| 摘要 |
The present invention provides a semiconductor integrated circuit device provided with an interface circuit, which has realized speeding-up. A first input circuit inputs a data strobe signal therein, and a second input circuit inputs therein data formed in sync with the timing of a change in the data strobe signal. A second delay time determination circuit determines an arriving delay time relative to an internal clock in a predetermined determination region in response to the data strobe signal inputted through the first input circuit. The data sampled using the data strobe signal and inputted through the second input circuit is synchronized with the internal clock. A first delay time determination circuit is provided which determines each signal delay time in accordance with a test clock sent via a dummy input/output circuit equally set to signal delay times of a first output circuit and the first and second input circuits. The determination region is changed in time on the basis of the result of determination by the first delay time determination circuit.
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