发明名称 Biasing structure for accessing semiconductor memory cell storage elements
摘要 A biasing structure for a memory cell storage element, for setting an operating voltage at an accession electrode of the memory cell storage element. The biasing structure includes a biasing transistor coupled to the accession electrode and adapted to set the operating voltage based on a biasing voltage received at a control electrode of the biasing transistor, and a biasing voltage generator for generating the biasing voltage. The biasing voltage generator includes a feedback voltage regulation structure adapted track changes in a threshold voltage of the biasing transistor, so as to keep the operating voltage at the accession electrode of the memory cell storage element substantially stable against operating condition changes.
申请公布号 US7321516(B2) 申请公布日期 2008.01.22
申请号 US20050063651 申请日期 2005.02.22
申请人 STMICROELECTRONICS, S.R.L.;ST MICROELECTRONICS SA 发明人 DI MARTINO ALBERTO JOSE';CASTALDO ENRICO;DEMANGE NICOLAS;ZOMPI DANIELE SALVATORE
分类号 G11C15/00;G11C5/14;G11C11/24;G11C16/04;G11C16/24;G11C16/30;G11C29/00 主分类号 G11C15/00
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