发明名称 Multi-layer structure for use in the fabrication of integrated circuit devices and methods for fabrication of same
摘要 A multi-layer structure for use in the fabrication of integrated circuit devices is adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.
申请公布号 US7321132(B2) 申请公布日期 2008.01.22
申请号 US20050080293 申请日期 2005.03.15
申请人 LOCKHEED MARTIN CORPORATION 发明人 ROBINSON KEVIN L.;WITKOWSKI LARRY;KAO MING-YIH
分类号 H01L29/06;H01L21/338;H01L29/201;H01L29/732 主分类号 H01L29/06
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