| 摘要 |
A digital sum value (DSV) control apparatus inserts a DC control bit for each DC control block. The apparatus includes a first DSV accumulated value comparator for setting a target flag to a DC control bit for a first DC control block, a second DSV accumulated value comparator for comparing a first DSV accumulated value accumulated and calculated from DSV values of the first DC control block with a second DSV accumulated value accumulated and calculated from DSV values of a plurality of DC control blocks subsequent to the first DC control block, and a DC control bit determination output section for determining a value of a DC control bit for the first control block according to an output of the first and the second DSV accumulated value comparators.
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