发明名称 Reducing resistivity in interconnect structures by forming an inter-layer
摘要 An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, and a damascene structure in the opening. The damascene structure includes a metallic barrier layer in the opening and in physical contact with the dielectric layer, a conductive material filling the remaining part of the opening, and an interlayer between and adjoining the metallic barrier layer and the conductive material. The interlayer is preferably a metal compound layer.
申请公布号 US2008012133(A1) 申请公布日期 2008.01.17
申请号 US20060486893 申请日期 2006.07.13
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 SHIH CHIH-CHAO;HUANG CHENG-LIN;HSIEH CHING-HUA;SHUE SHAU-LIN
分类号 H01L23/52 主分类号 H01L23/52
代理机构 代理人
主权项
地址