CDR CIRCUIT

摘要

PROBLEM TO BE SOLVED: To obtain reproduced data from which jitter included in input data is removed.

SOLUTION: A reference clock having the same frequency as the data rate frequency of the input data is phase-adjusted to generate a regenerated clock, with which the input data is written to an FIFO 101. The reference clock or another clock which does not have synchronism relation with the regenerated clock is used to read the FIFO 101to output the reproduced data from the FIFO 101.

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