| 摘要 |
An improved cross-coupled CMOS high-voltage latch (100) that is used for storing data bits to be written to memory cells of a non-volatile memory is provided with a switching circuit (116) that, during writing of data bits into the memory cells of the latch, provides a high series impedance between one leg of the latch and ground to limit leakage current. A large number of latches are connected in parallel and their accumulated leakage currents are limited by the switching circuit (116) to prevent overload of a high-voltage generator, such as a charge pump circuit, for the high- voltage latch (100), so that data can be properly written in the memory cells of the non-volatile memory. |
