| 摘要 |
A method for fabricating a vertical channel transistor device is provided. An opening is formed in a dielectric stack comprised of a pad nitride layer and a pad oxide layer. A plurality of epitaxial silicon growth and dry etching processes are carried out to form drain, vertical channel and source in the opening. Subsequently, sidewall gate dielectric and sidewall gate electrode are formed on the vertical channel. The present invention is suited for dynamic random access memory (DRAM) devices, particularly suited for very high-density trench-capacitor DRAM devices.
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