| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device in which the cost of a test can be reduced due to the cost reduction of a tester by reducing a capacity of an expected value memory in the tester, in the semiconductor integrated circuit device frovided with the memory with multiple bits of word lengths and a BIST (Build In Self Test) circuit for testing the memory. SOLUTION: By the BIST circuit 9, output data Do0-Do3 and expected values E0-E3 are compared for every address of a RAM 1, and comparison result signals C0-C3 (MDO) for expressing the matched bits resulting from comparison between the expected values and the output data, as "0", and for expressing the unmatched bits resulting from comparison between the expected values and the output data, as "1", are serially output to the outside. COPYRIGHT: (C)2008,JPO&INPIT
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