发明名称 |
Semiconductor memory device and bit error detection method thereof |
摘要 |
A memory device detects and corrects bit errors. The memory device includes cyclic redundancy check (CRC) and error correction code (ECC) circuits. The CRC circuit generates a write CRC code corresponding to data to be stored in memory cells. The ECC circuit generates an ECC code corresponding to the data and detecting and correcting a bit error of the data by means of the ECC code during a read operation. The CRC circuit generates a read CRC code corresponding to data corrected by the ECC circuit during the read operation, and corrects a bit error of the data according to a comparison of the read CRC code and the write CRC code.
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申请公布号 |
US2008016428(A1) |
申请公布日期 |
2008.01.17 |
申请号 |
US20060582106 |
申请日期 |
2006.10.17 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE SHEA-YUN;SONG DONG-HYUN;KIM JANG-HWAN;MIN SANG-LYUL |
分类号 |
G11C29/00;H03M13/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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