发明名称 Transistor and memory cell array and methods of making the same
摘要 A method of forming a transistor involves defining an active area by defining isolation trenches, the isolation trenches being adjacent to the active area, and forming a gate electrode after defining the isolation trenches. The gate electrode is formed by etching a gate groove in the active area selectively with respect to an insulating material filling the isolation trenches, etching the insulating material filling the isolation trenches at a portion adjacent to a channel such that a portion of the channel having the shape of a ridge with a top side and two lateral sides is uncovered, providing a gate insulating material on the top side and the lateral sides, and providing a conducting material on the gate insulating layer such that the gate electrode is disposed along the top side and the two lateral sides of the channel.
申请公布号 US2008012067(A1) 申请公布日期 2008.01.17
申请号 US20060486385 申请日期 2006.07.14
申请人 WU DONGPING 发明人 WU DONGPING
分类号 H01L29/76;H01L21/336 主分类号 H01L29/76
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