发明名称 Pulsed flop with embedded logic
摘要 In one embodiment, an apparatus comprises a logic circuit, a plurality of passgates, at least one pulse generator, and a plurality of latch elements. The logic circuit has a plurality of inputs, and each of the passgates has an output directly connected to one of the inputs. The pulse generator is configured to generate a pair of control signals to the passgates, and is configured to generate pulses on the pair of control signals to open the passgates. Each of the latch elements is connected to a respective input and is configured to latch the signal on the respective input when passgates are open and to retain the signal on the respective input when the passgates are closed.
申请公布号 US7319344(B2) 申请公布日期 2008.01.15
申请号 US20050304855 申请日期 2005.12.15
申请人 P.A. SEMI, INC. 发明人 KLASS EDGARDO F.
分类号 H03K19/20 主分类号 H03K19/20
代理机构 代理人
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