发明名称 Memory testing
摘要 This application discloses a data processing apparatus comprising: at least one memory; processing logic operable to perform data processing operations on data and operable to access said at least one memory; and memory testing logic operable to perform a transparent algorithm testing routine on said at least one memory, said data processing apparatus impeding said processing logic from accessing said at least one memory while said memory testing logic is performing said testing routine; wherein said processing logic and said memory testing logic are operable to detect a system event, said memory testing logic being operable when performing said testing routine to respond to detection of said system event by stopping said testing routine and restoring said at least one memory to an initial state, said initial state being a state it was in immediately prior to commencement of said testing routine, whereupon said data processing apparatus is operable to allow said processing logic to access said at least one memory.
申请公布号 US2008010567(A1) 申请公布日期 2008.01.10
申请号 US20070808258 申请日期 2007.06.07
申请人 ARM LIMITED 发明人 HUGHES PAUL S.
分类号 G11C29/14 主分类号 G11C29/14
代理机构 代理人
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