| 摘要 |
A method for fabricating an integrated circuit (IC) chip includes forming a metal trace having a thickness of between 5 mum and 27 mum over a semiconductor substrate, and forming a passivation layer on the metal trace, wherein the passivation layer includes a layer of silicon nitride on the metal trace and a layer of silicon oxide on the layer of silicon nitride, or includes a layer of silicon oxynitride on the metal trace and a layer of silicon oxide on the layer of silicon oxynitride. |
