| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device wherein the misjudgment on a leakage current due to piezo electric effect in a chip forming location in a wafer state scarcely occurs even when dust exists on a stage for characteristic measurement. SOLUTION: The underside diffusion layer 16 consists of an n field stop layer 9 formed on the underside of an n-semiconductor substrate 1, and a p-collector layer 10 formed on the surface layer of this n field stop layer 9. Its thickness is as thin as 5 μm or less. At this case, an underside electrode 19 formed of laminated films such as Ti films 11, 13 and an Ni film 14 is provided with an Al-Si film 12 with a 0.3-4 μm thickness sandwiched between the laminated films to achieve stress cushioning, so that the misjudgment ratio is reduced on the leakage current in the chip in the wafer state due to piezo electric effect. COPYRIGHT: (C)2008,JPO&INPIT
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