| 摘要 |
A multi-path digital power supply controller includes a first ADC (ADCl) coupled to the supply's output voltage V<SUB>out</SUB> and arranged to provide an output which varies with V<SUB>out</SUB>' s low frequency components, and a second ADC (ADC2) coupled to V<SUB>out</SUB> and arranged to provide an output which varies with V<SUB>out</SUB>' s high frequency components, A digital reference value is subtracted from the output of ADCl to produce a low frequency digital error signal, and a summing circuit sums the low frequency digital error signal and the output of ADC2. Processing circuitry is arranged to produce an. output which varies with the summed signal and is suitable for coupling to a power stage for use in regulating V<SUB>out</SUB>. Preferably, ADCl is a low-bandwidth high- resolution ADC and ADC2 is a high-bandwidth low-resolution ADC, both of which are low-cost components. |
