| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which a load due to coupling capacitance between the wiring and an element signal can be uniformed when wiring crossing over a memory cell array element signal. <P>SOLUTION: A sending-out point A and a receiving point B of a signal are wired across a memory cell region. A wiring 700 between A and B is bent at two points on each of bit lines BL0-BL4. In such a case as this, since areas where the wiring 700 and the bit lines BL0-BL4 run along with each other are equal to one another for each bit line, the coupling capacitances between the wiring 700 and each of bit lines BL0-BL4 are equalized. Thereby a situation where the load is slanted to only some bit lines is avoided, and no influence is exerted on lead characteristics. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
