| 摘要 |
Exemplary embodiments include a system for coherent data correctness checking including: an address manager in operable communication with a processor, a DRAM model, and a IO bus; and a persistent memory model in operable communication with the processor, the IO bus, and a unit monitor checker, the persistent memory model operable for storing data information that can be compared with a data stored in an internal cache of the processor or the DRAM, wherein the unit monitor checker tracks memory operations throughout the system.
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