发明名称 INTEGRIERUNG VON FEHLERERKENNUNG MIT RUN-TO-RUN STEUERUNG
摘要 <p>Semiconductor wafers are processed in conjunction with a manufacturing execution system using a run-to-run controller and a fault detection system. A recipe is received from the manufacturing execution system by the run-to-run controller for controlling a tool. The recipe includes a setpoint for obtaining one or more target wafer properties. Processing of the wafers is monitored by measuring processing attributes including fault conditions and wafer properties using the fault detection system and one or more sensors. Setpoints of the recipe may be modified at the run-to-run controller according to the processing attributes to maintain the target wafer properties, except in cases when a fault condition is detected by the fault detection system. Thus, data acquired in the presence of tool or wafer fault conditions are not used for feedback purposes. In addition, fault detection models may be used to define a range of conditions indicative of a fault condition. In these cases, the fault detection models may be modified to incorporate, as parameters, setpoints of a recipe modified by a run-to-run controller.</p>
申请公布号 DE60220063(T2) 申请公布日期 2008.01.10
申请号 DE2002620063T 申请日期 2002.07.12
申请人 APPLIED MATERIALS INC. 发明人 REISS, TERRY P.;SHANMUGASUNDRAM, ARULKUMAR P.;SCHWARM, ALEXANDER T.
分类号 G05B19/418;H01L21/02;G05B23/02;G06F19/00;H01L21/00;H01L21/66 主分类号 G05B19/418
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