发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To sharply shorten write time of data in nonvolatile semiconductor memory by eliminating overheads in a whole bit write termination determination operation which will terminate in fail. <P>SOLUTION: After impressing writing bias to a writing target memory cell at first writing, write verification is performed. A CPU 19 omits whole the bit write termination determination operation which determines completion of writing whole bits, up to the number of times set in a setting register 18 of number of determination omit times. When the whole bit write termination determination operation is omitted for 3 times, impression of writing bias to the memory cell and write verify are repeated up to the third writing, and after the impression of writing bias to the memory cell and write verify to the forth time, the whole bit write termination determination operation is performed. When the determination result is Not Good, the impression of writing bias to memory cell, write verify, and the whole bit writing termination determination operation is repeatedly performed until it becomes OK. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008004160(A) 申请公布日期 2008.01.10
申请号 JP20060171880 申请日期 2006.06.21
申请人 RENESAS TECHNOLOGY CORP 发明人 KINO YUSUKE;ITO TAKASHI;YAMAUCHI TADAAKI
分类号 G11C16/02 主分类号 G11C16/02
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