| 摘要 |
A bitline of a semiconductor device and a method for fabricating the same are provided to reduce the loading capacitance of the bitline by extending a gap between the bitlines. A bitline of a semiconductor device includes a first lower bitline(13a), an upper bitline(15), and a second lower bitline(13c). The bitlines are arrayed on a semiconductor substrate composed of a cell region and a page buffer region. The bitlines belonging to any one of odd number-th groups and even number-th groups among the bitlines include the first upper bitline and the upper bitline. The first lower bitline is formed in a predetermined part of the cell region. The upper bit line is formed on the first lower bitline. The upper bit line extends from the page buffer region to connect the first lower bitline and the page buffer region. Bitlines belonging to the other group are formed on the same plane as the first lower bitline and connect the cell region and the page buffer region.
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