| 摘要 |
A refresh circuit for a semiconductor memory device is provided to prevent refresh operation error by precharging a bank active signal(BA) normally, by reducing pulse width of an auto refresh signal(AREF) narrower than tRAS during low frequency operation. A command decoder part(300) generates an auto refresh signal corresponding to frequency state of an external clock by decoding external commands synchronized to the external clock. A pulse generation part(400) outputs an auto refresh pulse signal by adjusting pulse width of the auto refresh signal according to the amount of delay. An active state part(500) generates a bank active signal by using the auto refresh pulse signal and an active end signal. A delay part(600) generates the active end pulse to precharge the bank active signal using the bank active signal.
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