| 摘要 |
A clock tree circuit and a duty correction test method using the same and a semiconductor memory device comprising the same are provided to discriminate whether duty distortion of a clock outputted from the clock tree circuit is caused by a delay locked loop or the clock tree circuit. A delay locked loop(100) outputs a DLL(Delay Locked Loop) clock by compensating for skew between an external clock and an internal clock. An oscillation part(200) provides a reference clock. A selection part(300) selects one of the DLL clock and the reference clock according to a selection signal enabled in a test mode as an input clock. A clock tree circuit(500) adjusts duty ratio of the input clock.
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