发明名称 TRANSIENT VOLTAGE SUPPRESSOR AND INTEGRATED CIRCUIT USING THE SAME
摘要 A transient voltage suppressor and an integrated circuit using the same are provided to reduce a capacitance composition by positioning a low-density epitaxial layer on a lateral part of a doping region. An epitaxial layer(120) is formed on a surface of a substrate(110). A doping region(130) is formed from a surface of the epitaxial layer to the surface of the substrate. An isolation region(140) is separated from a lateral surface of the doping region of the epitaxial layer. The isolation region is formed around the doping region. The isolation region comes in contact with the surface of the epitaxial layer and a top surface of the substrate. An insulating layer(150) is formed on a region including the surface of the epitaxial layer between the doping region and the isolation region. A first electrode(160) is formed on a surface of the isolation region. A second electrode(170) is formed on the surface of the doping region.
申请公布号 KR100791259(B1) 申请公布日期 2008.01.04
申请号 KR20070057503 申请日期 2007.06.12
申请人 KEC CORPORATION 发明人 KIM, WEON CHAN;KIM, IN SU;SONG, IN HYUK
分类号 H01L27/02 主分类号 H01L27/02
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