METHOD OF FORMING A GATE STRUCTURE OF NON-VOLATILE MEMORY DEVICE
摘要
<p>A method for forming a gate structure of a non-volatile memory device is provided to improve a leakage current characteristic and a threshold voltage scattering of the non-volatile memory device by forming an interlayer dielectric made of a dual layer composed of a silicon oxide layer and a silicon oxynitride layer. A tunnel dielectric layer pattern(110a) and a floating gate(120a) are sequentially formed on a semiconductor substrate(100). An interlayer dielectric pattern(130a) is formed on the floating gate, and has a dual layer structure of a silicon oxide layer and a silicon oxynitride layer. A control gate(140a) is formed on the interlayer dielectric pattern. The silicon oxynitride layer is formed on the silicon oxide layer by an LPCVD(Low Pressure Chemical Vapor Deposition) process.</p>
申请公布号
KR20080002030(A)
申请公布日期
2008.01.04
申请号
KR20060060569
申请日期
2006.06.30
申请人
SAMSUNG ELECTRONICS CO., LTD.
发明人
KIM, HYOENG KI;LEE, WOONG;PARK, JUNG HYUN;HYUNG, YONG WOO;HAN, JAE JONG;SON, HO MIN;JANG, WON JUN;JEE, JUNG GEUN