| 摘要 |
A divide-by-4 prescaler for a superhigh frequency over 10 GHz is provided to decrease a needed area by including a first divide-by-2 circuit with an inductor and a second divide-by-2 circuit without the inductor. A divide-by-4 prescaler(300) includes a first divide-by-2 circuit(310) and a second divide-by-2 circuit. The first divide-by-2 circuit of a charge injection locked frequency divider type has a pair of inductors(311,312), a pair of varactors(321,322) having one ends connected to one ends of the inductors, a pair of NMOS FETs(Field Effect Transistor)(331,332) of a common source type, and a pair of NMOS FETs(341,342) applied with a pair of high frequency input signals, and outputs output signals(Vout+,Vout-) divided-by-2 by receiving high frequency signals(Vin+,Vin-). The second divide-by-2 circuit of a current mode logic type does not have the inductor, and generates output signals additionally divided-by-2 by receiving the output signals of the first divide-by-2 circuit. |
