METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE

摘要

A method for forming an isolation layer in a semiconductor device is provided to minimize a step of the surface of an SOD(spin on dielectric) layer in a process for forming an isolation layer made of a stack layer of an SOD layer and an HDP(high density plasma) oxide layer by performing a CMP process after the SOD layer is formed. On a semiconductor substrate(41) having an active region and an isolation region, a mask pattern exposing the isolation region is formed wherein the mask pattern is made of a stack structure composed of a pad oxide layer, a pad nitride layer and a polysilicon layer. By using the mask pattern as an etch mask, the exposed isolation region of the substrate is etched to form a trench. An SOD layer(46) is formed on the resultant structure to fill the trench. A CMP process is performed on the SOD layer to expose the polysilicon layer of the mask pattern. The SOD layer is baked. The exposed polysilicon layer is removed. The SOD layer having undergone the CMP process is etched back in a manner that the surface of the SOD layer becomes lower than that surface of the substrate. An HDP oxide layer(47) is formed on the resultant structure. A CMP process is performed on the HDP oxide layer to expose the pad nitride layer of the mask pattern. The mask pattern is removed.