发明名称 |
A Method of Generating an Eye Diagram of Integrated Circuit Transmitted Signals |
摘要 |
A sequence of K voltage samples of a transmitted data signal is generated by sampling, digitizing, and storing voltage samples of the data signal with an imbedded sample clock on an IC having an unknown period TS. The K voltage samples are plotted against a time base of K sequential times TB[K] normalized so all samples fall within one cycle of the data clock used to generate the data signal or a unit time of 1. The time base is generated by estimating the sample clock period TSE to be some multiple of 1/P where P is greater than K. Eye diagrams are analyzed for time jitter wherein only the minimum value of jitter is saved. TSE is incremented by 1/P until TS is greater than one half the data clock period. The eye diagram at the TSE with the minimum time jitter is used to analyze the data channels.
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申请公布号 |
US2008002762(A1) |
申请公布日期 |
2008.01.03 |
申请号 |
US20060427831 |
申请日期 |
2006.06.30 |
申请人 |
CRANFORD HAYDEN C;GEBARA FADI H;SCHAUB JEREMY D |
发明人 |
CRANFORD HAYDEN C.;GEBARA FADI H.;SCHAUB JEREMY D. |
分类号 |
H04B3/46;H04L7/00 |
主分类号 |
H04B3/46 |
代理机构 |
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地址 |
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