| 摘要 |
<p>A method for forming an overlay vernier of a semiconductor device is provided to prevent a bottom surface attack of a vernier in a rework process by forming a smooth slop. An oxide layer(102) is formed on an upper surface of a lower layer(101) after a particular deposition process is performed on the lower layer. A trench(103) having a reverse trapezoid structure is formed within the oxide layer by performing an etch process. A metal layer(105), an a-carbon layer(106), and a capping SiON layer(107) are sequentially formed on the entire structure including the trench. The etch process is performed by using all kinds of etchers irrespective of plasma types of RIE, ME-RIE, ICP, ECR, and HEIicon.</p> |
