| 摘要 |
A method for manufacturing a semiconductor device is provided to increase an overlap margin by simplifying a manufacturing process by omitting an etching process for extending a lower electrode via-hole. A laminate structure having first and second interlayer dielectrics and a hard mask layer is formed on a semiconductor substrate. A gate electrode, a landing plug, and a bit line(125) are formed on the semiconductor substrate. An exposure process and a developing process using a wave type mask are performed on the hard mask layer, such that a photoresist pattern is formed. The laminate structure is etched by using the photoresist pattern as the mask, such that a lower electrode via-hole(170) is formed. The lower electrode via-hole exposes the landing plug. A spacer is formed at a sidewall of the lower electrode via-hole. A polysilicon layer is formed to bury the lower electrode via-hole. The polysilicon layer is planarized, such that a lower electrode via is formed.
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