CONVERSION DEVICE, CONVERSION METHOD, PROGRAM, AND RECORDING MEDIUM

摘要

Provided is a conversion device or the like for converting a given initial test pattern into a test pattern having a bit constitution of different logical values, without lowering a failure detection percentage of transitional delay failures, which can detected by the components of the initial test pattern. The conversion device converts the initial test pattern (100a) given in advance to a logic circuit, into the intermediate test pattern (100b) having a bit constitution of different logical values. The components of the initial test pattern (100a) are at least two consecutively applied test vectors. The conversion device includes decision means for deciding such a combination of the logical values in the initial test pattern (100a) as satisfies the conditions for detecting the failures of the logic circuit, which are detected by applying the components.