| 摘要 |
An internal read signal generator and a semiconductor memory device comprising the same are provided to assure setup/hold time of an input signal under high frequency environment. A first delay unit(203) delays a clock signal to assure margin of setup/hold time of an input signal. A transfer unit transfers the input signal by being synchronized with an output clock of the first delay unit. A second delay unit(204) delays an output signal of the transfer unit. An output part(205) assembles the input signal and an output signal of the second delay unit. The delay amount of the second delay unit enables a rising edge of the output signal at the output part to have a period of the clock signal.
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