发明名称 APPARATUS AND METHOD FOR CONTROLLING HYBRID ARQ MEMORY IN BROADBAND WIRELESS ACCESS COMMUNICATION SYSTEM
摘要 A method and HARQ memory apparatus in a BWA communication system are provided where the HARQ memory apparatus includes a memory configured to partition the entire memory area in units of slots corresponding to the size of a concatenation block, to input/output a plurality of channel data to the slot in units of the concatenation block, to store a new concatenation block in an empty slot, and to combine a retransmitted concatenation block with a prestored concatenation block and store the combined concatenation block at a prestored location. Accordingly, the required amount of memory can be reduced by using a buffer efficiently. In particular, when a memory is embedded in an integrated circuit, the size and power consumption of the integrated circuit can be reduced.
申请公布号 US2008002629(A1) 申请公布日期 2008.01.03
申请号 US20070769992 申请日期 2007.06.28
申请人 ROH JIN WOO;SEOL JI-YUN;SONG BONG-GEE;LIM JONG-HAN;LEE JUNG-HO 发明人 ROH JIN WOO;SEOL JI-YUN;SONG BONG-GEE;LIM JONG-HAN;LEE JUNG-HO
分类号 H04B7/216 主分类号 H04B7/216
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