发明名称 TIME- INTERLEAVED ANALOG-TO-DIGITAL CONVERTER SYSTEM
摘要 The invention provides a method and a module for estimating a plurality o f relative channel-error dk, Gk, Ck for at least one signal Xk with respect to a reference signal X0. The signals X0 and Xk are produced by an analog-to -digital module 10 comprising parallel and time interleaved analog-to-digita l converters and are received by an estimation module 20. The method is perf ormed by said estimation module 20 and it comprises the steps of: defining S l a function F(dk,Gk,Ck) representing a relationship between said reference signal X0 and an arbitrary signal Xk in said group of signals X0-XN-1; selec ting S2 a first reference signal X0 in said group of signals X0 - XN-1. The method comprises the further steps of: selecting S3 a second signal Xk from the remaining signals X1 - XN-1 in said group; and optimizing S4 the functio n F{dk, Gk, Ck) so as to obtain an estimate dk, Gk, Ck of said plurality of relative channel-error dk, Gk, Ck; repeating said further steps for each rem aining signal X1 - XN-1.
申请公布号 CA2655506(A1) 申请公布日期 2008.01.03
申请号 CA20062655506 申请日期 2006.06.30
申请人 SIGNAL PROCESSING DEVICES SWEDEN AB 发明人 LOWENBORG, PER;JOHANSSON, HAKAN
分类号 H03M1/12;H03M1/06;H03M1/08 主分类号 H03M1/12
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