发明名称 WAFER LEVEL CHIP SCALE PACKAGE FOR IMAGESENSOR AND METHOD OF MANUFACTURING THE SAME
摘要 A wafer level chip scale package for an image sensor and a manufacturing method thereof are provided to reduce dimension of a chip scale package by simply realizing the chip scale package of a wafer level. A first flexible printed circuit board(303) has an opening unit where light passing through a glass(301) is transmitted, at least one first pad(306), and at least second pad(304). The first and second pads are formed around the opening unit on a second surface of the first flexible printed circuit board. A first surface of the first flexible printed circuit board is adhered to a lower portion of the glass through a first adhesive unit(302). An image sensor chip(307) is bonded to the first pad. A second flexible printed circuit board has a lead terminal and a third pad. The lead terminal is lead-bonded to the second pad. The third pad for forming an external connecting terminal is formed on a second surface of the second flexible printed circuit board. A first surface of the second flexible printed circuit board is adhered to a lower portion of the image sensor chip through a second adhesive unit. The external connecting terminal(305) is formed on the third pad.
申请公布号 KR100790336(B1) 申请公布日期 2008.01.02
申请号 KR20070097670 申请日期 2007.09.28
申请人 J-TECH SEMICONDUCTOR. CO., LTD. 发明人 KIM, JIN SUNG
分类号 H01L23/12 主分类号 H01L23/12
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