发明名称 VARIABLE RESISTANCE RANDOM ACCESS MEMORY DEVICE COMPRISING N+ INTERFACIAL LAYER
摘要 <p>A variable resistance random access memory is provided to use a low-cost metal as a lower electrode by forming an n+ interface layer between the lower electrode and an n buffer layer and to decrease a manufacturing cost. A variable resistance random access memory includes a lower electrode(20), an n+ interface layer(22), a buffer layer(24), an oxide layer(26), and an upper electrode(28). The n+ interface layer is formed on the lower electrode. The buffer layer is formed on the n+ interface layer. The oxide layer is formed on the buffer layer and has a variable resistance. The upper electrode is formed on the oxide film. The oxide film is made of a p-type transition metal oxide.</p>
申请公布号 KR20080000358(A) 申请公布日期 2008.01.02
申请号 KR20060058098 申请日期 2006.06.27
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, CHOONG RAE;LEE, EUN HONG;GENRIKH STEFANOVICH;BOU RIM
分类号 H01L27/115 主分类号 H01L27/115
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