| 摘要 |
A MOSFET(Metal Oxide Semiconductor Field Effect Transistor) device and a method for fabricating the same are provided to reduce resistance to improve the performance of a transistor by forming a second gate electrode pattern after forming a first gate electrode pattern. A gate dielectric is formed on a semiconductor substrate(200) and a first gate pattern(203) is formed on the gate dielectric. An oxide layer(205) where impurities is doped is formed at both sides of the gate electrode pattern. A second gate electrode pattern is formed on the first gate electrode pattern including the oxide layer. The oxide layer is etched by using the second gate electrode pattern to form an oxide layer pattern. The impurities of the oxide layer pattern are thermally diffused on the inside of the substrate to form LDD(Lightly Doping Drain) regions(209a,209b). A spacer(211) is formed on the oxide layer pattern and on both sidewalls of the second electrode pattern. Source/drain regions(213a,213b) are formed on the surface of the substrate at both sides of the first gate electrode pattern and the second gate electrode pattern including the spacer by using an ion implantation process. Silicide layers(215,217a,217b) are formed on the gate electrode pattern, the second gate electrode pattern, and an upper portion of the source/drain regions.
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