发明名称 Method for fabricating semiconductor device
摘要 An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region ( 3 ), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12 , so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
申请公布号 US7314805(B2) 申请公布日期 2008.01.01
申请号 US20060519907 申请日期 2006.09.13
申请人 发明人
分类号 H01L21/331 主分类号 H01L21/331
代理机构 代理人
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