发明名称 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method for semiconductor devices whereby a dual damascene structure can be formed whose formation accuracy is so good as to prevent the upper portions of its connection holes from shoulder-falling, and further, a highly reliable semiconductor device can be obtained whose void generation is prevented. SOLUTION: The manufacturing method for semiconductor devices has a process for forming first of all an interlayer insulating film 5 on a substrate 1, a process for forming as a first mask a resist pattern 9 having connection-hole patterns above the interlayer insulating film 5, a process for forming next connection holes 5a in the interlayer insulating film 5 by etching performed from above the resist pattern (the first mask) 9, a process for forming thereafter a protective layer 21 in the state of covering with it the inner walls of the connection holes 5a, a process for forming next as a second mask on the interlayer insulating film 5 having the formed connection holes 5a a resist pattern having a wiring-groove pattern, a process for forming by the etching performed from above the second mask the wiring groove on the upper portion of the connection holes 5a whose inner walls are protected by the protective film 21, a process for exposing the substrate to the external in the bottoms of the connection holes 5a, and a process for forming thereafter an embedded wiring in the wiring groove and the connection holes 5a. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007335621(A) 申请公布日期 2007.12.27
申请号 JP20060165517 申请日期 2006.06.15
申请人 SONY CORP 发明人 FUKAZAWA MASANAGA
分类号 H01L21/768 主分类号 H01L21/768
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