发明名称 Verfahren zur Hestellung von zusammengestzten Halbleiterplättchen mittels Schichtübertragung
摘要 Process for manufacturing a wafer using semiconductor processing techniques, wherein a bonding layer (11) is formed on a top surface of a first wafer (10); a deep trench (21) is dug in a substrate (W Si 2) of semiconductor material belonging to a second wafer (20); a top layer (22) of semiconductor material is formed on top of the substrate so as to close the deep trench (21) at the top and form at least one buried cavity (24); the top layer (22) of the second wafer (30) is bonded to the first wafer (10) through the bonding layer (11); the two wafers are subjected to a thermal treatment that causes bonding of at least one portion (42) of the top layer (22) to the first wafer (10) and widening of the buried cavity (24). In this way, the portion (42) of the top layer (22) bonded to the first wafer (10) is separated from the rest (60) of the second wafer (30), to form a composite wafer (50).
申请公布号 DE602004010117(D1) 申请公布日期 2007.12.27
申请号 DE20046010117T 申请日期 2004.09.16
申请人 STMICROELECTRONICS S.R.L., AGRATE BRIANZA 发明人 BARLOCCHI, GABRIELE;VILLA, FLAVIO FRANCESCO
分类号 H01L21/762;H01L21/20;H01L21/302;H01L21/304;H01L21/324 主分类号 H01L21/762
代理机构 代理人
主权项
地址