发明名称 Semiconductor integrated circuit device
摘要 DLL circuit operating more stably at reset. Voltage comparator circuit 21 outputs comparison result signal to hold circuit 22 at first level when power supply voltage VAA is not higher than reference voltage REF and at second level when power supply voltage VAA exceeds reference voltage REF. Hold circuit 22 outputs reset signal RST that it has received to DLL circuit 23 as it is when comparison result signal indicates first level and at second level, hold circuit 22 holds reset signal RST until comparison result signal becomes first level and then outputs it to DLL circuit 23.
申请公布号 US2007296474(A1) 申请公布日期 2007.12.27
申请号 US20070806027 申请日期 2007.05.29
申请人 ELPIDA MEMORY, INC. 发明人 SUGIMOTO KEI
分类号 H03L7/06 主分类号 H03L7/06
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