发明名称 METHOD AND APPARATUS FOR PERFORMING CHIP LEVEL EQUALIZATION USING JOINT PROCESSING
摘要 A method and apparatus for performing chip level equalization (CLE) using joint processing to enhance performance and system throughput using a transmitter having a plurality of transmit antennas and a receiver having a plurality of receive antennas. A channel response matrix is formed between the transmit antennas and the receive antennas to generate a joint channel correlation matrix between the transmit antennas and the receive antennas using a block-FFT (B-FFT) decomposition of the channel response matrix. Estimates of transmitted chip sequences from each of the transmit antennas are generated using minimum mean square error (MMSE) and the joint channel correlation matrix are combined. The combined estimate of the transmitted chip sequences are despread to recover transmitted data.
申请公布号 WO2006065428(A3) 申请公布日期 2007.12.27
申请号 WO2005US41471 申请日期 2005.11.15
申请人 INTERDIGITAL TECHNOLOGY CORPORATION;PAN, KYLE JUNG-LIN;DIFAZIO, ROBERT, A. 发明人 PAN, KYLE JUNG-LIN;DIFAZIO, ROBERT, A.
分类号 H04B7/216;H04J99/00 主分类号 H04B7/216
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