发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD OF DESIGNING WIRING PATTERN AND DEVICE FOR DESIGNING WIRING PATTERN OF SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which is easy to design and has a low wiring resistance, and also to provide a method and a device for designing a semiconductor integrated circuit. SOLUTION: A semiconductor integrated circuit device includes a plurality of signal wirings of the same width which are arranged parallel to each other and spaced at equal intervals on a first wiring layer with at least two adjoining signal wirings of the plurality of signal wirings being interconnected electrically. COPYRIGHT: (C)2008,JPO&INPIT |
申请公布号 |
JP2007335850(A) |
申请公布日期 |
2007.12.27 |
申请号 |
JP20070124784 |
申请日期 |
2007.05.09 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
SHINOMIYA NORIKO;MUKAI KIYOSHI |
分类号 |
H01L21/822;G06F17/50;H01L21/82;H01L27/04 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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